int max_wg_per_cu; // max work groups per compute unit - refer to
// cudaOccupancyMaxActiveBlocksPerMultiprocessor
bool vmm; // virtual memory support
+ bool l0_device_type_valid;
bool l0_discrete_gpu; // Level Zero backend and not an integrated GPU
size_t vmm_granularity; // granularity of virtual memory
size_t total_vram;
ze_device_properties_t props = {};
props.stype = ZE_STRUCTURE_TYPE_DEVICE_PROPERTIES;
ze_result_t r = zeDeviceGetProperties(ze_dev, &props);
- info.devices[i].l0_discrete_gpu = r == ZE_RESULT_SUCCESS && !(props.flags & ZE_DEVICE_PROPERTY_FLAG_INTEGRATED);
+ if (r == ZE_RESULT_SUCCESS) {
+ info.devices[i].l0_device_type_valid = true;
+ info.devices[i].l0_discrete_gpu = !(props.flags & ZE_DEVICE_PROPERTY_FLAG_INTEGRATED);
+ }
}
#endif
}
}
static enum ggml_backend_dev_type ggml_backend_sycl_device_get_type(ggml_backend_dev_t dev) {
- GGML_UNUSED(dev);
+ ggml_backend_sycl_device_context * ctx = (ggml_backend_sycl_device_context *)dev->context;
+ const sycl_device_info & info = ggml_sycl_info().devices[ctx->device];
+ if (info.l0_device_type_valid && !info.l0_discrete_gpu) {
+ return GGML_BACKEND_DEVICE_TYPE_IGPU;
+ }
return GGML_BACKEND_DEVICE_TYPE_GPU;
}