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(parent: c21d976)
Support pure float16 add/sub/mul/div operations in the CUDA (and CPU) backend (#1121)
authorcmdr2 <redacted>
Tue, 25 Feb 2025 12:36:34 +0000 (18:06 +0530)
committerGitHub <redacted>
Tue, 25 Feb 2025 12:36:34 +0000 (13:36 +0100)
commit738a3aea59f1c0c7751d65307d1228c1dbbf6a84
treed6ec76ed3cf356ee28f64489e4d2e5e696c44519tree
parentc21d976febcc75bcc487e4a2e4074b488f829553commit | diff
Support pure float16 add/sub/mul/div operations in the CUDA (and CPU) backend (#1121)

* Support float16-to-float16 add/sub/mul/div operations in the CUDA backend

* Add fp16 support for add/sub/mul/div on the CPU backend

* Add test cases for fp16 add/sub/mul/div
src/ggml-cpu/ggml-cpu.c diff | blob | history
src/ggml-cuda/binbcast.cu diff | blob | history
tests/test-backend-ops.cpp diff | blob | history
Packaging of ggml-org/ggml